<AVRPART>
  <LOCKBIT>
    <ICON/>
    <ID/>
    <TEXT>[LB1 = 1 :  LB2 = 1] No memory lock features enabled. [LB1 = 0 :  LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB1 = 0 :  LB2 = 0] Same as previous, but verify is also disabled</TEXT>
    <NMB_TEXT>3</NMB_TEXT>
    <NMB_LOCK_BITS>2</NMB_LOCK_BITS>
    <TEXT1>
      <MASK>0x03</MASK>
      <VALUE>0x03</VALUE>
      <TEXT>Mode 1: No memory lock features enabled</TEXT>
    </TEXT1>
    <TEXT2>
      <MASK>0x03</MASK>
      <VALUE>0x02</VALUE>
      <TEXT>Mode 2: Further programming disabled</TEXT>
    </TEXT2>
    <TEXT3>
      <MASK>0x03</MASK>
      <VALUE>0x00</VALUE>
      <TEXT>Mode 3: Further programming and verification disabled</TEXT>
    </TEXT3>
    <LOCKBIT0>
      <NAME>LB1</NAME>
      <TEXT>Lockbit</TEXT>
    </LOCKBIT0>
    <LOCKBIT1>
      <NAME>LB2</NAME>
      <TEXT>Lockbit</TEXT>
    </LOCKBIT1>
  </LOCKBIT>
  <ADMIN>
    <PART_NAME>ATtiny43U</PART_NAME>
    <SPEED>20MHZ</SPEED>
    <BUILD>1</BUILD>
    <RELEASE_STATUS>RELEASED</RELEASE_STATUS>
    <SIGNATURE>
      <ADDR000>$1E</ADDR000>
      <ADDR001>$92</ADDR001>
      <ADDR002>$0C</ADDR002>
    </SIGNATURE>
  </ADMIN>
  <MEMORY>
    <ID>AVRSimMemory8bit.SimMemory8bit</ID>
    <PROG_FLASH>4096</PROG_FLASH>
    <EEPROM>64</EEPROM>
    <INT_SRAM>
      <SIZE>256</SIZE>
      <START_ADDR>$60</START_ADDR>
    </INT_SRAM>
    <EXT_SRAM>
      <SIZE>0</SIZE>
      <START_ADDR>NA</START_ADDR>
    </EXT_SRAM>
    <IO_MEMORY>
      <IO_START_ADDR>$00</IO_START_ADDR>
      <IO_STOP_ADDR>$3F</IO_STOP_ADDR>
      <EXT_IO_START_ADDR>NA</EXT_IO_START_ADDR>
      <EXT_IO_STOP_ADDR>NA</EXT_IO_STOP_ADDR>
      <MEM_START_ADDR>$20</MEM_START_ADDR>
      <MEM_STOP_ADDR>$5F</MEM_STOP_ADDR>
      <SREG>
        <IO_ADDR>$3F</IO_ADDR>
        <MEM_ADDR>$5F</MEM_ADDR>
        <C_MASK>0x01</C_MASK>
        <Z_MASK>0x02</Z_MASK>
        <N_MASK>0x04</N_MASK>
        <V_MASK>0x08</V_MASK>
        <S_MASK>0x10</S_MASK>
        <H_MASK>0x20</H_MASK>
        <T_MASK>0x40</T_MASK>
        <I_MASK>0x80</I_MASK>
      </SREG>
      <SPH>
        <IO_ADDR>$3E</IO_ADDR>
        <MEM_ADDR>$5E</MEM_ADDR>
        <INIT>0x01</INIT>
        <SP8_MASK>0x01</SP8_MASK>
      </SPH>
      <SPL>
        <IO_ADDR>$3D</IO_ADDR>
        <MEM_ADDR>$5D</MEM_ADDR>
        <INIT>0x5f</INIT>
        <SP0_MASK>0x01</SP0_MASK>
        <SP1_MASK>0x02</SP1_MASK>
        <SP2_MASK>0x04</SP2_MASK>
        <SP3_MASK>0x08</SP3_MASK>
        <SP4_MASK>0x10</SP4_MASK>
        <SP5_MASK>0x20</SP5_MASK>
        <SP6_MASK>0x40</SP6_MASK>
        <SP7_MASK>0x80</SP7_MASK>
      </SPL>
      <OCR0B>
        <IO_ADDR>$3C</IO_ADDR>
        <MEM_ADDR>$5C</MEM_ADDR>
        <OCR0_0_MASK>0x01</OCR0_0_MASK>
        <OCR0_1_MASK>0x02</OCR0_1_MASK>
        <OCR0_2_MASK>0x04</OCR0_2_MASK>
        <OCR0_3_MASK>0x08</OCR0_3_MASK>
        <OCR0_4_MASK>0x10</OCR0_4_MASK>
        <OCR0_5_MASK>0x20</OCR0_5_MASK>
        <OCR0_6_MASK>0x40</OCR0_6_MASK>
        <OCR0_7_MASK>0x80</OCR0_7_MASK>
      </OCR0B>
      <GIMSK>
        <IO_ADDR>$3B</IO_ADDR>
        <MEM_ADDR>$5B</MEM_ADDR>
        <PCIE0_MASK>0x10</PCIE0_MASK>
        <PCIE1_MASK>0x20</PCIE1_MASK>
        <INT0_MASK>0x40</INT0_MASK>
      </GIMSK>
      <GIFR>
        <IO_ADDR>$3A</IO_ADDR>
        <MEM_ADDR>$5A</MEM_ADDR>
        <PCIF0_MASK>0x10</PCIF0_MASK>
        <PCIF1_MASK>0x20</PCIF1_MASK>
        <INTF0_MASK>0x40</INTF0_MASK>
      </GIFR>
      <TIMSK0>
        <IO_ADDR>$39</IO_ADDR>
        <MEM_ADDR>$59</MEM_ADDR>
        <TOIE0_MASK>0x01</TOIE0_MASK>
        <OCIE0A_MASK>0x02</OCIE0A_MASK>
        <OCIE0B_MASK>0x04</OCIE0B_MASK>
      </TIMSK0>
      <TIFR0>
        <IO_ADDR>$38</IO_ADDR>
        <MEM_ADDR>$58</MEM_ADDR>
        <TOV0_MASK>0x01</TOV0_MASK>
        <OCF0A_MASK>0x02</OCF0A_MASK>
        <OCF0B_MASK>0x04</OCF0B_MASK>
      </TIFR0>
      <SPMCSR>
        <IO_ADDR>$37</IO_ADDR>
        <MEM_ADDR>$57</MEM_ADDR>
        <SPMEN_MASK>0x01</SPMEN_MASK>
        <PGERS_MASK>0x02</PGERS_MASK>
        <PGWRT_MASK>0x04</PGWRT_MASK>
        <RFLB_MASK>0x08</RFLB_MASK>
        <CTPB_MASK>0x10</CTPB_MASK>
      </SPMCSR>
      <OCR0A>
        <IO_ADDR>$36</IO_ADDR>
        <MEM_ADDR>$56</MEM_ADDR>
        <OCR0_0_MASK>0x01</OCR0_0_MASK>
        <OCR0_1_MASK>0x02</OCR0_1_MASK>
        <OCR0_2_MASK>0x04</OCR0_2_MASK>
        <OCR0_3_MASK>0x08</OCR0_3_MASK>
        <OCR0_4_MASK>0x10</OCR0_4_MASK>
        <OCR0_5_MASK>0x20</OCR0_5_MASK>
        <OCR0_6_MASK>0x40</OCR0_6_MASK>
        <OCR0_7_MASK>0x80</OCR0_7_MASK>
      </OCR0A>
      <MCUCR>
        <IO_ADDR>$35</IO_ADDR>
        <MEM_ADDR>$55</MEM_ADDR>
        <ISC00_MASK>0x01</ISC00_MASK>
        <ISC01_MASK>0x02</ISC01_MASK>
        <BODSE_MASK>0x04</BODSE_MASK>
        <SM0_MASK>0x08</SM0_MASK>
        <SM1_MASK>0x10</SM1_MASK>
        <SE_MASK>0x20</SE_MASK>
        <PUD_MASK>0x40</PUD_MASK>
        <BODS_MASK>0x80</BODS_MASK>
      </MCUCR>
      <MCUSR>
        <IO_ADDR>$34</IO_ADDR>
        <MEM_ADDR>$54</MEM_ADDR>
        <PORF_MASK>0x01</PORF_MASK>
        <EXTRF_MASK>0x02</EXTRF_MASK>
        <BORF_MASK>0x04</BORF_MASK>
        <WDRF_MASK>0x08</WDRF_MASK>
      </MCUSR>
      <TCCR0B>
        <IO_ADDR>$33</IO_ADDR>
        <MEM_ADDR>$53</MEM_ADDR>
        <CS00_MASK>0x01</CS00_MASK>
        <CS01_MASK>0x02</CS01_MASK>
        <CS02_MASK>0x04</CS02_MASK>
        <WGM02_MASK>0x08</WGM02_MASK>
        <FOC0B_MASK>0x40</FOC0B_MASK>
        <FOC0A_MASK>0x80</FOC0A_MASK>
      </TCCR0B>
      <TCNT0>
        <IO_ADDR>$32</IO_ADDR>
        <MEM_ADDR>$52</MEM_ADDR>
        <TCNT0_0_MASK>0x01</TCNT0_0_MASK>
        <TCNT0_1_MASK>0x02</TCNT0_1_MASK>
        <TCNT0_2_MASK>0x04</TCNT0_2_MASK>
        <TCNT0_3_MASK>0x08</TCNT0_3_MASK>
        <TCNT0_4_MASK>0x10</TCNT0_4_MASK>
        <TCNT0_5_MASK>0x20</TCNT0_5_MASK>
        <TCNT0_6_MASK>0x40</TCNT0_6_MASK>
        <TCNT0_7_MASK>0x80</TCNT0_7_MASK>
      </TCNT0>
      <OSCCAL>
        <IO_ADDR>$31</IO_ADDR>
        <MEM_ADDR>$51</MEM_ADDR>
        <CAL0_MASK>0x01</CAL0_MASK>
        <CAL1_MASK>0x02</CAL1_MASK>
        <CAL2_MASK>0x04</CAL2_MASK>
        <CAL3_MASK>0x08</CAL3_MASK>
        <CAL4_MASK>0x10</CAL4_MASK>
        <CAL5_MASK>0x20</CAL5_MASK>
        <CAL6_MASK>0x40</CAL6_MASK>
        <CAL7_MASK>0x80</CAL7_MASK>
      </OSCCAL>
      <TCCR0A>
        <IO_ADDR>$30</IO_ADDR>
        <MEM_ADDR>$50</MEM_ADDR>
        <WGM00_MASK>0x01</WGM00_MASK>
        <WGM01_MASK>0x02</WGM01_MASK>
        <COM0B0_MASK>0x10</COM0B0_MASK>
        <COM0B1_MASK>0x20</COM0B1_MASK>
        <COM0A0_MASK>0x40</COM0A0_MASK>
        <COM0A1_MASK>0x80</COM0A1_MASK>
      </TCCR0A>
      <TCCR1A>
        <IO_ADDR>$2F</IO_ADDR>
        <MEM_ADDR>$4F</MEM_ADDR>
        <WGM10_MASK>0x01</WGM10_MASK>
        <WGM11_MASK>0x02</WGM11_MASK>
        <COM1B0_MASK>0x10</COM1B0_MASK>
        <COM1B1_MASK>0x20</COM1B1_MASK>
        <COM1A0_MASK>0x40</COM1A0_MASK>
        <COM1A1_MASK>0x80</COM1A1_MASK>
      </TCCR1A>
      <TCCR1B>
        <IO_ADDR>$2E</IO_ADDR>
        <MEM_ADDR>$4E</MEM_ADDR>
        <CS10_MASK>0x01</CS10_MASK>
        <CS11_MASK>0x02</CS11_MASK>
        <CS12_MASK>0x04</CS12_MASK>
        <WGM12_MASK>0x08</WGM12_MASK>
        <FOC1B_MASK>0x40</FOC1B_MASK>
        <FOC1A_MASK>0x80</FOC1A_MASK>
      </TCCR1B>
      <TCNT1>
        <IO_ADDR>$2D</IO_ADDR>
        <MEM_ADDR>$4D</MEM_ADDR>
        <TCNT1_0_MASK>0x01</TCNT1_0_MASK>
        <TCNT1_1_MASK>0x02</TCNT1_1_MASK>
        <TCNT1_2_MASK>0x04</TCNT1_2_MASK>
        <TCNT1_3_MASK>0x08</TCNT1_3_MASK>
        <TCNT1_4_MASK>0x10</TCNT1_4_MASK>
        <TCNT1_5_MASK>0x20</TCNT1_5_MASK>
        <TCNT1_6_MASK>0x40</TCNT1_6_MASK>
        <TCNT1_7_MASK>0x80</TCNT1_7_MASK>
      </TCNT1>
      <OCR1A>
        <IO_ADDR>$2C</IO_ADDR>
        <MEM_ADDR>$4C</MEM_ADDR>
        <OCR1_0_MASK>0x01</OCR1_0_MASK>
        <OCR1_1_MASK>0x02</OCR1_1_MASK>
        <OCR1_2_MASK>0x04</OCR1_2_MASK>
        <OCR1_3_MASK>0x08</OCR1_3_MASK>
        <OCR1_4_MASK>0x10</OCR1_4_MASK>
        <OCR1_5_MASK>0x20</OCR1_5_MASK>
        <OCR1_6_MASK>0x40</OCR1_6_MASK>
        <OCR1_7_MASK>0x80</OCR1_7_MASK>
      </OCR1A>
      <OCR1B>
        <IO_ADDR>$2B</IO_ADDR>
        <MEM_ADDR>$4B</MEM_ADDR>
        <OCR1_0_MASK>0x01</OCR1_0_MASK>
        <OCR1_1_MASK>0x02</OCR1_1_MASK>
        <OCR1_2_MASK>0x04</OCR1_2_MASK>
        <OCR1_3_MASK>0x08</OCR1_3_MASK>
        <OCR1_4_MASK>0x10</OCR1_4_MASK>
        <OCR1_5_MASK>0x20</OCR1_5_MASK>
        <OCR1_6_MASK>0x40</OCR1_6_MASK>
        <OCR1_7_MASK>0x80</OCR1_7_MASK>
      </OCR1B>
      <CLKPR>
        <IO_ADDR>$26</IO_ADDR>
        <MEM_ADDR>$46</MEM_ADDR>
        <CLKPS0_MASK>0x01</CLKPS0_MASK>
        <CLKPS1_MASK>0x02</CLKPS1_MASK>
        <CLKPS2_MASK>0x04</CLKPS2_MASK>
        <CLKPS3_MASK>0x08</CLKPS3_MASK>
        <CLKPCE_MASK>0x80</CLKPCE_MASK>
      </CLKPR>
      <GTCCR>
        <IO_ADDR>$23</IO_ADDR>
        <MEM_ADDR>$43</MEM_ADDR>
        <PSR10_MASK>0x01</PSR10_MASK>
        <TSM_MASK>0x80</TSM_MASK>
      </GTCCR>
      <WDTCSR>
        <IO_ADDR>$21</IO_ADDR>
        <MEM_ADDR>$41</MEM_ADDR>
        <WDP0_MASK>0x01</WDP0_MASK>
        <WDP1_MASK>0x02</WDP1_MASK>
        <WDP2_MASK>0x04</WDP2_MASK>
        <WDE_MASK>0x08</WDE_MASK>
        <WDCE_MASK>0x10</WDCE_MASK>
        <WDP3_MASK>0x20</WDP3_MASK>
        <WDIE_MASK>0x40</WDIE_MASK>
        <WDIF_MASK>0x80</WDIF_MASK>
      </WDTCSR>
      <PCMSK1>
        <IO_ADDR>$20</IO_ADDR>
        <MEM_ADDR>$40</MEM_ADDR>
        <PCINT8_MASK>0x01</PCINT8_MASK>
        <PCINT9_MASK>0x02</PCINT9_MASK>
        <PCINT10_MASK>0x04</PCINT10_MASK>
        <PCINT11_MASK>0x08</PCINT11_MASK>
        <PCINT12_MASK>0x10</PCINT12_MASK>
        <PCINT13_MASK>0x20</PCINT13_MASK>
        <PCINT14_MASK>0x40</PCINT14_MASK>
        <PCINT15_MASK>0x80</PCINT15_MASK>
      </PCMSK1>
      <EEAR>
        <IO_ADDR>$1E</IO_ADDR>
        <MEM_ADDR>$3E</MEM_ADDR>
        <EEAR0_MASK>0x01</EEAR0_MASK>
        <EEAR1_MASK>0x02</EEAR1_MASK>
        <EEAR2_MASK>0x04</EEAR2_MASK>
        <EEAR3_MASK>0x08</EEAR3_MASK>
        <EEAR4_MASK>0x10</EEAR4_MASK>
        <EEAR5_MASK>0x20</EEAR5_MASK>
      </EEAR>
      <EEDR>
        <IO_ADDR>$1D</IO_ADDR>
        <MEM_ADDR>$3D</MEM_ADDR>
        <EEDR0_MASK>0x01</EEDR0_MASK>
        <EEDR1_MASK>0x02</EEDR1_MASK>
        <EEDR2_MASK>0x04</EEDR2_MASK>
        <EEDR3_MASK>0x08</EEDR3_MASK>
        <EEDR4_MASK>0x10</EEDR4_MASK>
        <EEDR5_MASK>0x20</EEDR5_MASK>
        <EEDR6_MASK>0x40</EEDR6_MASK>
        <EEDR7_MASK>0x80</EEDR7_MASK>
      </EEDR>
      <EECR>
        <IO_ADDR>$1C</IO_ADDR>
        <MEM_ADDR>$3C</MEM_ADDR>
        <EERE_MASK>0x01</EERE_MASK>
        <EEPE_MASK>0x02</EEPE_MASK>
        <EEMPE_MASK>0x04</EEMPE_MASK>
        <EERIE_MASK>0x08</EERIE_MASK>
        <EEPM0_MASK>0x10</EEPM0_MASK>
        <EEPM1_MASK>0x20</EEPM1_MASK>
      </EECR>
      <PORTA>
        <IO_ADDR>$1B</IO_ADDR>
        <MEM_ADDR>$3B</MEM_ADDR>
        <PORTA0_MASK>0x01</PORTA0_MASK>
        <PORTA1_MASK>0x02</PORTA1_MASK>
        <PORTA2_MASK>0x04</PORTA2_MASK>
        <PORTA3_MASK>0x08</PORTA3_MASK>
        <PORTA4_MASK>0x10</PORTA4_MASK>
        <PORTA5_MASK>0x20</PORTA5_MASK>
        <PORTA6_MASK>0x40</PORTA6_MASK>
        <PORTA7_MASK>0x80</PORTA7_MASK>
      </PORTA>
      <DDRA>
        <IO_ADDR>$1A</IO_ADDR>
        <MEM_ADDR>$3A</MEM_ADDR>
        <DDA0_MASK>0x01</DDA0_MASK>
        <DDA1_MASK>0x02</DDA1_MASK>
        <DDA2_MASK>0x04</DDA2_MASK>
        <DDA3_MASK>0x08</DDA3_MASK>
        <DDA4_MASK>0x10</DDA4_MASK>
        <DDA5_MASK>0x20</DDA5_MASK>
        <DDA6_MASK>0x40</DDA6_MASK>
        <DDA7_MASK>0x80</DDA7_MASK>
      </DDRA>
      <PINA>
        <IO_ADDR>$19</IO_ADDR>
        <MEM_ADDR>$39</MEM_ADDR>
        <PINA0_MASK>0x01</PINA0_MASK>
        <PINA1_MASK>0x02</PINA1_MASK>
        <PINA2_MASK>0x04</PINA2_MASK>
        <PINA3_MASK>0x08</PINA3_MASK>
        <PINA4_MASK>0x10</PINA4_MASK>
        <PINA5_MASK>0x20</PINA5_MASK>
        <PINA6_MASK>0x40</PINA6_MASK>
        <PINA7_MASK>0x80</PINA7_MASK>
      </PINA>
      <PORTB>
        <IO_ADDR>$18</IO_ADDR>
        <MEM_ADDR>$38</MEM_ADDR>
        <PORTB0_MASK>0x01</PORTB0_MASK>
        <PORTB1_MASK>0x02</PORTB1_MASK>
        <PORTB2_MASK>0x04</PORTB2_MASK>
        <PORTB3_MASK>0x08</PORTB3_MASK>
        <PORTB4_MASK>0x10</PORTB4_MASK>
        <PORTB5_MASK>0x20</PORTB5_MASK>
        <PORTB6_MASK>0x40</PORTB6_MASK>
        <PORTB7_MASK>0x80</PORTB7_MASK>
      </PORTB>
      <DDRB>
        <IO_ADDR>$17</IO_ADDR>
        <MEM_ADDR>$37</MEM_ADDR>
        <DDB0_MASK>0x01</DDB0_MASK>
        <DDB1_MASK>0x02</DDB1_MASK>
        <DDB2_MASK>0x04</DDB2_MASK>
        <DDB3_MASK>0x08</DDB3_MASK>
        <DDB4_MASK>0x10</DDB4_MASK>
        <DDB5_MASK>0x20</DDB5_MASK>
        <DDB6_MASK>0x40</DDB6_MASK>
        <DDB7_MASK>0x80</DDB7_MASK>
      </DDRB>
      <PINB>
        <IO_ADDR>$16</IO_ADDR>
        <MEM_ADDR>$36</MEM_ADDR>
        <PINB0_MASK>0x01</PINB0_MASK>
        <PINB1_MASK>0x02</PINB1_MASK>
        <PINB2_MASK>0x04</PINB2_MASK>
        <PINB3_MASK>0x08</PINB3_MASK>
        <PINB4_MASK>0x10</PINB4_MASK>
        <PINB5_MASK>0x20</PINB5_MASK>
        <PINB6_MASK>0x40</PINB6_MASK>
        <PINB7_MASK>0x80</PINB7_MASK>
      </PINB>
      <GPIOR2>
        <IO_ADDR>$15</IO_ADDR>
        <MEM_ADDR>$35</MEM_ADDR>
        <GPIOR20_MASK>0x01</GPIOR20_MASK>
        <GPIOR21_MASK>0x02</GPIOR21_MASK>
        <GPIOR22_MASK>0x04</GPIOR22_MASK>
        <GPIOR23_MASK>0x08</GPIOR23_MASK>
        <GPIOR24_MASK>0x10</GPIOR24_MASK>
        <GPIOR25_MASK>0x20</GPIOR25_MASK>
        <GPIOR26_MASK>0x40</GPIOR26_MASK>
        <GPIOR27_MASK>0x80</GPIOR27_MASK>
      </GPIOR2>
      <GPIOR1>
        <IO_ADDR>$14</IO_ADDR>
        <MEM_ADDR>$34</MEM_ADDR>
        <GPIOR10_MASK>0x01</GPIOR10_MASK>
        <GPIOR11_MASK>0x02</GPIOR11_MASK>
        <GPIOR12_MASK>0x04</GPIOR12_MASK>
        <GPIOR13_MASK>0x08</GPIOR13_MASK>
        <GPIOR14_MASK>0x10</GPIOR14_MASK>
        <GPIOR15_MASK>0x20</GPIOR15_MASK>
        <GPIOR16_MASK>0x40</GPIOR16_MASK>
        <GPIOR17_MASK>0x80</GPIOR17_MASK>
      </GPIOR1>
      <GPIOR0>
        <IO_ADDR>$13</IO_ADDR>
        <MEM_ADDR>$33</MEM_ADDR>
        <GPIOR00_MASK>0x01</GPIOR00_MASK>
        <GPIOR01_MASK>0x02</GPIOR01_MASK>
        <GPIOR02_MASK>0x04</GPIOR02_MASK>
        <GPIOR03_MASK>0x08</GPIOR03_MASK>
        <GPIOR04_MASK>0x10</GPIOR04_MASK>
        <GPIOR05_MASK>0x20</GPIOR05_MASK>
        <GPIOR06_MASK>0x40</GPIOR06_MASK>
        <GPIOR07_MASK>0x80</GPIOR07_MASK>
      </GPIOR0>
      <PCMSK0>
        <IO_ADDR>$12</IO_ADDR>
        <MEM_ADDR>$32</MEM_ADDR>
        <PCINT0_MASK>0x01</PCINT0_MASK>
        <PCINT1_MASK>0x02</PCINT1_MASK>
        <PCINT2_MASK>0x04</PCINT2_MASK>
        <PCINT3_MASK>0x08</PCINT3_MASK>
        <PCINT4_MASK>0x10</PCINT4_MASK>
        <PCINT5_MASK>0x20</PCINT5_MASK>
        <PCINT6_MASK>0x40</PCINT6_MASK>
        <PCINT7_MASK>0x80</PCINT7_MASK>
      </PCMSK0>
      <USIBR>
        <IO_ADDR>$10</IO_ADDR>
        <MEM_ADDR>$30</MEM_ADDR>
        <USIBR0_MASK>0x01</USIBR0_MASK>
        <USIBR1_MASK>0x02</USIBR1_MASK>
        <USIBR2_MASK>0x04</USIBR2_MASK>
        <USIBR3_MASK>0x08</USIBR3_MASK>
        <USIBR4_MASK>0x10</USIBR4_MASK>
        <USIBR5_MASK>0x20</USIBR5_MASK>
        <USIBR6_MASK>0x40</USIBR6_MASK>
        <USIBR7_MASK>0x80</USIBR7_MASK>
      </USIBR>
      <USIDR>
        <IO_ADDR>$0F</IO_ADDR>
        <MEM_ADDR>$2F</MEM_ADDR>
        <USIDR0_MASK>0x01</USIDR0_MASK>
        <USIDR1_MASK>0x02</USIDR1_MASK>
        <USIDR2_MASK>0x04</USIDR2_MASK>
        <USIDR3_MASK>0x08</USIDR3_MASK>
        <USIDR4_MASK>0x10</USIDR4_MASK>
        <USIDR5_MASK>0x20</USIDR5_MASK>
        <USIDR6_MASK>0x40</USIDR6_MASK>
        <USIDR7_MASK>0x80</USIDR7_MASK>
      </USIDR>
      <USISR>
        <IO_ADDR>$0E</IO_ADDR>
        <MEM_ADDR>$2E</MEM_ADDR>
        <USICNT0_MASK>0x01</USICNT0_MASK>
        <USICNT1_MASK>0x02</USICNT1_MASK>
        <USICNT2_MASK>0x04</USICNT2_MASK>
        <USICNT3_MASK>0x08</USICNT3_MASK>
        <USIDC_MASK>0x10</USIDC_MASK>
        <USIPF_MASK>0x20</USIPF_MASK>
        <USIOIF_MASK>0x40</USIOIF_MASK>
        <USISIF_MASK>0x80</USISIF_MASK>
      </USISR>
      <USICR>
        <IO_ADDR>$0D</IO_ADDR>
        <MEM_ADDR>$2D</MEM_ADDR>
        <USITC_MASK>0x01</USITC_MASK>
        <USICLK_MASK>0x02</USICLK_MASK>
        <USICS0_MASK>0x04</USICS0_MASK>
        <USICS1_MASK>0x08</USICS1_MASK>
        <USIWM0_MASK>0x10</USIWM0_MASK>
        <USIWM1_MASK>0x20</USIWM1_MASK>
        <USIOIE_MASK>0x40</USIOIE_MASK>
        <USISIE_MASK>0x80</USISIE_MASK>
      </USICR>
      <TIMSK1>
        <IO_ADDR>$0C</IO_ADDR>
        <MEM_ADDR>$2C</MEM_ADDR>
        <TOIE1_MASK>0x01</TOIE1_MASK>
        <OCIE1A_MASK>0x02</OCIE1A_MASK>
        <OCIE1B_MASK>0x04</OCIE1B_MASK>
      </TIMSK1>
      <TIFR1>
        <IO_ADDR>$0B</IO_ADDR>
        <MEM_ADDR>$2B</MEM_ADDR>
        <TOV1_MASK>0x01</TOV1_MASK>
        <OCF1A_MASK>0x02</OCF1A_MASK>
        <OCF1B_MASK>0x04</OCF1B_MASK>
      </TIFR1>
      <ACSR>
        <IO_ADDR>$08</IO_ADDR>
        <MEM_ADDR>$28</MEM_ADDR>
        <ACIS0_MASK>0x01</ACIS0_MASK>
        <ACIS1_MASK>0x02</ACIS1_MASK>
        <ACIE_MASK>0x08</ACIE_MASK>
        <ACI_MASK>0x10</ACI_MASK>
        <ACO_MASK>0x20</ACO_MASK>
        <ACBG_MASK>0x40</ACBG_MASK>
        <ACD_MASK>0x80</ACD_MASK>
      </ACSR>
      <ADMUX>
        <IO_ADDR>$07</IO_ADDR>
        <MEM_ADDR>$27</MEM_ADDR>
        <MUX0_MASK>0x01</MUX0_MASK>
        <MUX1_MASK>0x02</MUX1_MASK>
        <MUX2_MASK>0x04</MUX2_MASK>
        <REFS_MASK>0x40</REFS_MASK>
      </ADMUX>
      <ADCSRA>
        <IO_ADDR>$06</IO_ADDR>
        <MEM_ADDR>$26</MEM_ADDR>
        <ADPS0_MASK>0x01</ADPS0_MASK>
        <ADPS1_MASK>0x02</ADPS1_MASK>
        <ADPS2_MASK>0x04</ADPS2_MASK>
        <ADIE_MASK>0x08</ADIE_MASK>
        <ADIF_MASK>0x10</ADIF_MASK>
        <ADATE_MASK>0x20</ADATE_MASK>
        <ADSC_MASK>0x40</ADSC_MASK>
        <ADEN_MASK>0x80</ADEN_MASK>
      </ADCSRA>
      <ADCH>
        <IO_ADDR>$05</IO_ADDR>
        <MEM_ADDR>$25</MEM_ADDR>
        <ADCH0_MASK>0x01</ADCH0_MASK>
        <ADCH1_MASK>0x02</ADCH1_MASK>
        <ADCH2_MASK>0x04</ADCH2_MASK>
        <ADCH3_MASK>0x08</ADCH3_MASK>
        <ADCH4_MASK>0x10</ADCH4_MASK>
        <ADCH5_MASK>0x20</ADCH5_MASK>
        <ADCH6_MASK>0x40</ADCH6_MASK>
        <ADCH7_MASK>0x80</ADCH7_MASK>
      </ADCH>
      <ADCL>
        <IO_ADDR>$04</IO_ADDR>
        <MEM_ADDR>$24</MEM_ADDR>
        <ADCL0_MASK>0x01</ADCL0_MASK>
        <ADCL1_MASK>0x02</ADCL1_MASK>
        <ADCL2_MASK>0x04</ADCL2_MASK>
        <ADCL3_MASK>0x08</ADCL3_MASK>
        <ADCL4_MASK>0x10</ADCL4_MASK>
        <ADCL5_MASK>0x20</ADCL5_MASK>
        <ADCL6_MASK>0x40</ADCL6_MASK>
        <ADCL7_MASK>0x80</ADCL7_MASK>
      </ADCL>
      <ADCSRB>
        <IO_ADDR>$03</IO_ADDR>
        <MEM_ADDR>$23</MEM_ADDR>
        <ACME_MASK>0x40</ACME_MASK>
        <ADTS0_MASK>0x01</ADTS0_MASK>
        <ADTS1_MASK>0x02</ADTS1_MASK>
        <ADTS2_MASK>0x04</ADTS2_MASK>
        <ADLAR_MASK>0x10</ADLAR_MASK>
        <BVRON_MASK>0x80</BVRON_MASK>
      </ADCSRB>
      <DIDR0>
        <IO_ADDR>$01</IO_ADDR>
        <MEM_ADDR>$21</MEM_ADDR>
        <ADC0D_MASK>0x01</ADC0D_MASK>
        <ADC1D_MASK>0x02</ADC1D_MASK>
        <ADC2D_MASK>0x04</ADC2D_MASK>
        <ADC3D_MASK>0x08</ADC3D_MASK>
        <AIN0D_MASK>0x10</AIN0D_MASK>
        <AIN1D_MASK>0x20</AIN1D_MASK>
      </DIDR0>
      <PRR>
        <IO_ADDR>$00</IO_ADDR>
        <MEM_ADDR>$20</MEM_ADDR>
        <PRADC_MASK>0x01</PRADC_MASK>
        <PRUSI_MASK>0x02</PRUSI_MASK>
        <PRTIM0_MASK>0x04</PRTIM0_MASK>
        <PRTIM1_MASK>0x08</PRTIM1_MASK>
      </PRR>
    </IO_MEMORY>
    <BOOT_CONFIG>
      <NRWW_START_ADDR>$0</NRWW_START_ADDR>
      <NRWW_STOP_ADDR>$3FF</NRWW_STOP_ADDR>
      <RWW_START_ADDR>$0</RWW_START_ADDR>
      <RWW_STOP_ADDR>$0</RWW_STOP_ADDR>
      <PAGESIZE>16</PAGESIZE>
    </BOOT_CONFIG>
  </MEMORY>
  <FUSE>
    <LIST>[LOW:HIGH:EXTENDED]</LIST>
    <ICON/>
    <ID/>
    <TEXT/>
    <LOW>
      <NMB_TEXT>50</NMB_TEXT>
      <NMB_FUSE_BITS>8</NMB_FUSE_BITS>
      <TEXT1>
        <MASK>0x80</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Divide clock by 8 internally; [CKDIV8=0]</TEXT>
      </TEXT1>
      <TEXT2>
        <MASK>0x40</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Clock output on PORTB5; [CKOUT=0]</TEXT>
      </TEXT2>
      <TEXT3>
        <MASK>0x3F</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms;   [CKSEL=0000 SUT=00]</TEXT>
      </TEXT3>
      <TEXT4>
        <MASK>0x3F</MASK>
        <VALUE>0x10</VALUE>
        <TEXT>Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0000 SUT=01]</TEXT>
      </TEXT4>
      <TEXT5>
        <MASK>0x3F</MASK>
        <VALUE>0x20</VALUE>
        <TEXT>Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms;  [CKSEL=0000 SUT=10]</TEXT>
      </TEXT5>
      <TEXT6>
        <MASK>0x3F</MASK>
        <VALUE>0x01</VALUE>
        <TEXT>PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms; [CKSEL=0001 SUT=00]</TEXT>
      </TEXT6>
      <TEXT7>
        <MASK>0x3F</MASK>
        <VALUE>0x11</VALUE>
        <TEXT>PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms; [CKSEL=0001 SUT=01]</TEXT>
      </TEXT7>
      <TEXT8>
        <MASK>0x3F</MASK>
        <VALUE>0x21</VALUE>
        <TEXT>PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms; [CKSEL=0001 SUT=10]</TEXT>
      </TEXT8>
      <TEXT9>
        <MASK>0x3F</MASK>
        <VALUE>0x31</VALUE>
        <TEXT>PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms; [CKSEL=0001 SUT=11]</TEXT>
      </TEXT9>
      <TEXT10>
        <MASK>0x3F</MASK>
        <VALUE>0x02</VALUE>
        <TEXT>Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0010 SUT=00]</TEXT>
      </TEXT10>
      <TEXT11>
        <MASK>0x3F</MASK>
        <VALUE>0x12</VALUE>
        <TEXT>Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0010 SUT=01]</TEXT>
      </TEXT11>
      <TEXT12>
        <MASK>0x3F</MASK>
        <VALUE>0x22</VALUE>
        <TEXT>Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0010 SUT=10]; default value</TEXT>
      </TEXT12>
      <TEXT13>
        <MASK>0x3F</MASK>
        <VALUE>0x03</VALUE>
        <TEXT>WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0011 SUT=00]</TEXT>
      </TEXT13>
      <TEXT14>
        <MASK>0x3F</MASK>
        <VALUE>0x13</VALUE>
        <TEXT>WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0011 SUT=01]</TEXT>
      </TEXT14>
      <TEXT15>
        <MASK>0x3F</MASK>
        <VALUE>0x23</VALUE>
        <TEXT>WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0011 SUT=10]</TEXT>
      </TEXT15>
      <TEXT16>
        <MASK>0x3F</MASK>
        <VALUE>0x04</VALUE>
        <TEXT>Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms; [CKSEL=0100 SUT=00]</TEXT>
      </TEXT16>
      <TEXT17>
        <MASK>0x3F</MASK>
        <VALUE>0x14</VALUE>
        <TEXT>Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms; [CKSEL=0100 SUT=01]</TEXT>
      </TEXT17>
      <TEXT18>
        <MASK>0x3F</MASK>
        <VALUE>0x24</VALUE>
        <TEXT>Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms; [CKSEL=0100 SUT=10]</TEXT>
      </TEXT18>
      <TEXT19>
        <MASK>0x3F</MASK>
        <VALUE>0x08</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1000 SUT=00]   </TEXT>
      </TEXT19>
      <TEXT20>
        <MASK>0x3F</MASK>
        <VALUE>0x18</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms;  [CKSEL=1000 SUT=01]   </TEXT>
      </TEXT20>
      <TEXT21>
        <MASK>0x3F</MASK>
        <VALUE>0x28</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms;   [CKSEL=1000 SUT=10]   </TEXT>
      </TEXT21>
      <TEXT22>
        <MASK>0x3F</MASK>
        <VALUE>0x38</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1000 SUT=11]   </TEXT>
      </TEXT22>
      <TEXT23>
        <MASK>0x3F</MASK>
        <VALUE>0x09</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms;  [CKSEL=1001 SUT=00]   </TEXT>
      </TEXT23>
      <TEXT24>
        <MASK>0x3F</MASK>
        <VALUE>0x19</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms;   [CKSEL=1001 SUT=01]   </TEXT>
      </TEXT24>
      <TEXT25>
        <MASK>0x3F</MASK>
        <VALUE>0x29</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1001 SUT=10]   </TEXT>
      </TEXT25>
      <TEXT26>
        <MASK>0x3F</MASK>
        <VALUE>0x39</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms;  [CKSEL=1001 SUT=11]   </TEXT>
      </TEXT26>
      <TEXT27>
        <MASK>0x3F</MASK>
        <VALUE>0x0A</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1010 SUT=00]   </TEXT>
      </TEXT27>
      <TEXT28>
        <MASK>0x3F</MASK>
        <VALUE>0x1A</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms;  [CKSEL=1010 SUT=01]   </TEXT>
      </TEXT28>
      <TEXT29>
        <MASK>0x3F</MASK>
        <VALUE>0x2A</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms;   [CKSEL=1010 SUT=10]   </TEXT>
      </TEXT29>
      <TEXT30>
        <MASK>0x3F</MASK>
        <VALUE>0x3A</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1010 SUT=11]   </TEXT>
      </TEXT30>
      <TEXT31>
        <MASK>0x3F</MASK>
        <VALUE>0x0B</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms;  [CKSEL=1011 SUT=00]   </TEXT>
      </TEXT31>
      <TEXT32>
        <MASK>0x3F</MASK>
        <VALUE>0x1B</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms;   [CKSEL=1011 SUT=01]   </TEXT>
      </TEXT32>
      <TEXT33>
        <MASK>0x3F</MASK>
        <VALUE>0x2B</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1011 SUT=10]   </TEXT>
      </TEXT33>
      <TEXT34>
        <MASK>0x3F</MASK>
        <VALUE>0x3B</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms;  [CKSEL=1011 SUT=11]   </TEXT>
      </TEXT34>
      <TEXT35>
        <MASK>0x3F</MASK>
        <VALUE>0x0C</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1100 SUT=00]   </TEXT>
      </TEXT35>
      <TEXT36>
        <MASK>0x3F</MASK>
        <VALUE>0x1C</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms;  [CKSEL=1100 SUT=01]   </TEXT>
      </TEXT36>
      <TEXT37>
        <MASK>0x3F</MASK>
        <VALUE>0x2C</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms;   [CKSEL=1100 SUT=10]   </TEXT>
      </TEXT37>
      <TEXT38>
        <MASK>0x3F</MASK>
        <VALUE>0x3C</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1100 SUT=11]   </TEXT>
      </TEXT38>
      <TEXT39>
        <MASK>0x3F</MASK>
        <VALUE>0x0D</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms;  [CKSEL=1101 SUT=00]   </TEXT>
      </TEXT39>
      <TEXT40>
        <MASK>0x3F</MASK>
        <VALUE>0x1D</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms;   [CKSEL=1101 SUT=01]   </TEXT>
      </TEXT40>
      <TEXT41>
        <MASK>0x3F</MASK>
        <VALUE>0x2D</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1101 SUT=10]   </TEXT>
      </TEXT41>
      <TEXT42>
        <MASK>0x3F</MASK>
        <VALUE>0x3D</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms;  [CKSEL=1101 SUT=11]   </TEXT>
      </TEXT42>
      <TEXT43>
        <MASK>0x3F</MASK>
        <VALUE>0x0E</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1110 SUT=00]   </TEXT>
      </TEXT43>
      <TEXT44>
        <MASK>0x3F</MASK>
        <VALUE>0x1E</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms;  [CKSEL=1110 SUT=01]   </TEXT>
      </TEXT44>
      <TEXT45>
        <MASK>0x3F</MASK>
        <VALUE>0x2E</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms;   [CKSEL=1110 SUT=10]   </TEXT>
      </TEXT45>
      <TEXT46>
        <MASK>0x3F</MASK>
        <VALUE>0x3E</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1110 SUT=11]   </TEXT>
      </TEXT46>
      <TEXT47>
        <MASK>0x3F</MASK>
        <VALUE>0x0F</VALUE>
        <TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms;  [CKSEL=1111 SUT=00]   </TEXT>
      </TEXT47>
      <TEXT48>
        <MASK>0x3F</MASK>
        <VALUE>0x1F</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms;   [CKSEL=1111 SUT=01]   </TEXT>
      </TEXT48>
      <TEXT49>
        <MASK>0x3F</MASK>
        <VALUE>0x2F</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1111 SUT=10]   </TEXT>
      </TEXT49>
      <TEXT50>
        <MASK>0x3F</MASK>
        <VALUE>0x3F</VALUE>
        <TEXT>Ext. Crystal Osc.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms;  [CKSEL=1111 SUT=11]   </TEXT>
      </TEXT50>
      <FUSE0>
        <NAME>CKSEL0</NAME>
        <TEXT>Select Clock source</TEXT>
        <DEFAULT>0</DEFAULT>
      </FUSE0>
      <FUSE1>
        <NAME>CKSEL1</NAME>
        <TEXT>Select Clock source</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE1>
      <FUSE2>
        <NAME>CKSEL2</NAME>
        <TEXT>Select Clock source</TEXT>
        <DEFAULT>0</DEFAULT>
      </FUSE2>
      <FUSE3>
        <NAME>CKSEL3</NAME>
        <TEXT>Select Clock source</TEXT>
        <DEFAULT>0</DEFAULT>
      </FUSE3>
      <FUSE4>
        <NAME>SUT0</NAME>
        <TEXT>Select start-up time</TEXT>
        <DEFAULT>0</DEFAULT>
      </FUSE4>
      <FUSE5>
        <NAME>SUT1</NAME>
        <TEXT>Select start-up time</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE5>
      <FUSE6>
        <NAME>CKOUT</NAME>
        <TEXT>Clock Output Enable</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE6>
      <FUSE7>
        <NAME>CKDIV8</NAME>
        <TEXT>Divide clock by 8</TEXT>
        <DEFAULT>0</DEFAULT>
      </FUSE7>
    </LOW>
    <HIGH>
      <NMB_TEXT>13</NMB_TEXT>
      <NMB_FUSE_BITS>8</NMB_FUSE_BITS>
      <TEXT1>
        <MASK>0x80</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Reset Disabled (Enable PB7 as i/o pin); [RSTDISBL=0]</TEXT>
      </TEXT1>
      <TEXT2>
        <MASK>0x40</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Debug Wire enable; [DWEN=0]</TEXT>
      </TEXT2>
      <TEXT3>
        <MASK>0x20</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Serial program downloading (SPI) enabled; [SPIEN=0]</TEXT>
      </TEXT3>
      <TEXT4>
        <MASK>0x10</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Watch-dog Timer always on; [WDTON=0]</TEXT>
      </TEXT4>
      <TEXT5>
        <MASK>0x08</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Preserve EEPROM memory through the Chip Erase cycle; [EESAVE=0]</TEXT>
      </TEXT5>
      <TEXT6>
        <MASK>0x07</MASK>
        <VALUE>0x04</VALUE>
        <TEXT>Brown-out detection level at VCC=4.3 V; [BODLEVEL=100] </TEXT>
      </TEXT6>
      <TEXT7>
        <MASK>0x07</MASK>
        <VALUE>0x05</VALUE>
        <TEXT>Brown-out detection level at VCC=2.7 V; [BODLEVEL=101] </TEXT>
      </TEXT7>
      <TEXT8>
        <MASK>0x07</MASK>
        <VALUE>0x06</VALUE>
        <TEXT>Brown-out detection level at VCC=1.8 V; [BODLEVEL=110] </TEXT>
      </TEXT8>
      <TEXT9>
        <MASK>0x07</MASK>
        <VALUE>0x03</VALUE>
        <TEXT>Brown-out detection level at VCC=2.3 V; [BODLEVEL=011] </TEXT>
      </TEXT9>
      <TEXT10>
        <MASK>0x07</MASK>
        <VALUE>0x02</VALUE>
        <TEXT>Brown-out detection level at VCC=2.2 V; [BODLEVEL=010] </TEXT>
      </TEXT10>
      <TEXT11>
        <MASK>0x07</MASK>
        <VALUE>0x01</VALUE>
        <TEXT>Brown-out detection level at VCC=1.9 V; [BODLEVEL=001] </TEXT>
      </TEXT11>
      <TEXT12>
        <MASK>0x07</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Brown-out detection level at VCC=2.0 V; [BODLEVEL=000] </TEXT>
      </TEXT12>
      <TEXT13>
        <MASK>0x07</MASK>
        <VALUE>0x07</VALUE>
        <TEXT>Brown-out detection disabled; [BODLEVEL=111]                              </TEXT>
      </TEXT13>
      <FUSE0>
        <NAME>BODLEVEL0</NAME>
        <TEXT>Brown-out Detector trigger level</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE0>
      <FUSE1>
        <NAME>BODLEVEL1</NAME>
        <TEXT>Brown-out Detector trigger level</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE1>
      <FUSE2>
        <NAME>BODLEVEL2</NAME>
        <TEXT>Brown-out Detector trigger level</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE2>
      <FUSE3>
        <NAME>EESAVE</NAME>
        <TEXT>EEPROM memory is preserved through the Chip Erase</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE3>
      <FUSE4>
        <NAME>WDTON</NAME>
        <TEXT>Watchdog Timer always on</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE4>
      <FUSE5>
        <NAME>SPIEN</NAME>
        <TEXT>Enable Serial Program and Data Downloading</TEXT>
        <DEFAULT>0</DEFAULT>
      </FUSE5>
      <FUSE6>
        <NAME>DWEN</NAME>
        <TEXT>DebugWIRE Enable</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE6>
      <FUSE7>
        <NAME>RSTDISBL</NAME>
        <TEXT>External Reset disable</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE7>
    </HIGH>
    <EXTENDED>
      <FUSE0>
        <NAME>SELFPRGEN</NAME>
        <TEXT>Self-Programming Enable</TEXT>
        <DEFAULT>1</DEFAULT>
      </FUSE0>
      <NMB_TEXT>1</NMB_TEXT>
      <NMB_FUSE_BITS>1</NMB_FUSE_BITS>
      <TEXT1>
        <MASK>0x01</MASK>
        <VALUE>0x00</VALUE>
        <TEXT>Self Programming enable; [SELFPRGEN=0]</TEXT>
      </TEXT1>
    </EXTENDED>
  </FUSE>
  <PROGRAMMING>
    <ISPInterface>
      <FuseProgMask>0xff,0xdf</FuseProgMask>
      <FuseWarning>1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!</FuseWarning>
      <FuseWarning>1,0x40,0x00,WARNING! Enabling the debugWIRE interface will disable the ISP interface!</FuseWarning>
      <FuseWarning>1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!</FuseWarning>
    </ISPInterface>
    <HVInterface>
      <FuseWarning>1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!</FuseWarning>
      <FuseWarning>1,0x40,0x00,WARNING! Enabling the debugWIRE interface will disable the ISP interface!</FuseWarning>
      <FuseWarning>1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!</FuseWarning>
    </HVInterface>
    <PRGISP>  
        <ZIF_NO>2</ZIF_NO>   
    </PRGISP>
    <PRGHV>
        <ZIF_NO>5</ZIF_NO>   
    </PRGHV>
    <TYPE>1</TYPE> 
    <SUBCLASS>4</SUBCLASS> 
    <OscCal>
      <OCEntry>0x00,8.0 MHz</OCEntry>
    </OscCal>
    <PROG_FLASH>4096</PROG_FLASH>
    <EEPROM>64</EEPROM>    
    <FlashPageSize>64</FlashPageSize>
    <EepromPageSize>4</EepromPageSize>
    <WD_Flash>9</WD_Flash>
    <WD_EEPROM>15</WD_EEPROM>
    <WD_ERASE>50</WD_ERASE>
    <WD_FUSE>9</WD_FUSE>
    <WD_LOCK>9</WD_LOCK>
    <WD_RESET>100</WD_RESET> 
    <FuseRCMD0>0x50000000</FuseRCMD0>    
    <FuseRCMD1>0x58080000</FuseRCMD1>    
    <FuseRCMD2>0x50080000</FuseRCMD2>    
    <FuseRPos>3</FuseRPos>    
    <FuseWCMD0>0xaca00000</FuseWCMD0>    
    <FuseWCMD1>0xaca80000</FuseWCMD1>    
    <FuseWCMD2>0xaca40000</FuseWCMD2>    
    <FuseWPos>3</FuseWPos>    
    <LockRCMD>0x58000000</LockRCMD>    
    <LockRPos>3</LockRPos>    
    <LockWCMD>0xace00000</LockWCMD>    
    <LockWPos>3</LockWPos>  
    <fusevalue>0xfedf62</fusevalue>  
    <FuseMask>0x1dfff</FuseMask>            
  </PROGRAMMING>
</AVRPART>
